Details

FPGA Prototyping by VHDL Examples


FPGA Prototyping by VHDL Examples

Xilinx MicroBlaze MCS SoC
2. Aufl.

von: Pong P. Chu

CHF 118.00

Verlag: Wiley
Format: PDF
Veröffentl.: 12.10.2017
ISBN/EAN: 9781119282754
Sprache: englisch
Anzahl Seiten: 632

DRM-geschütztes eBook, Sie benötigen z.B. Adobe Digital Editions und eine Adobe ID zum Lesen.

Beschreibungen

<p><b>A hands-on introduction to FPGA prototyping and SoC design</b></p> <p>This <i>Second Edition</i> of the popular book follows the same “learning-by-doing” approach to teach the fundamentals and practices of VHDL synthesis and FPGA prototyping. It uses a coherent series of examples to demonstrate the process to develop sophisticated digital circuits and IP (intellectual property) cores, integrate them into an SoC (system on a chip) framework, realize the system on an FPGA prototyping board, and verify the hardware and software operation. The examples start with simple gate-level circuits, progress gradually through the RT (register transfer) level modules, and lead to a functional embedded system with custom I/O peripherals and hardware accelerators. Although it is an introductory text, the examples are developed in a rigorous manner, and the derivations follow strict design guidelines and coding practices used for large, complex digital systems.</p> <p>The new edition is completely updated. It presents the hardware design in the SoC context and introduces the hardware-software co-design concept. Instead of treating examples as isolated entities, the book integrates them into a single coherent SoC platform that allows readers to explore both hardware and software “programmability” and develop complex and interesting embedded system projects. The revised edition:</p> <ul> <li>Adds four general-purpose IP cores, which are multi-channel PWM (pulse width modulation) controller, I<sup>2</sup>C controller, SPI controller, and XADC (Xilinx analog-to-digital converter) controller.</li> <li>Introduces a music synthesizer constructed with a DDFS (direct digital frequency synthesis) module and an ADSR (attack-decay-sustain-release) envelop generator.</li> <li>Expands the original video controller into a complete stream-based video subsystem that incorporates a video synchronization circuit, a test pattern generator, an OSD (on-screen display) controller, a sprite generator, and a frame buffer.</li> <li>Introduces basic concepts of software-hardware co-design with Xilinx MicroBlaze MCS soft-core processor.</li> <li>Provides an overview of bus interconnect and interface circuit.</li> <li>Introduces basic embedded system software development.</li> <li>Suggests additional modules and peripherals for interesting and challenging projects.</li> </ul> <p>The <i>FPGA Prototyping by VHDL Examples, Second Edition</i> makes a natural companion text for introductory and advanced digital design courses and embedded system course. It also serves as an ideal self-teaching guide for practicing engineers who wish to learn more about this emerging area of interest.</p>
<p>Preface ix</p> <p>Acknowledgments xv</p> <p><b>PART I BASIC  DIGITAL  CIRCUITS DEVELOPMENT</b></p> <p><b>1 Gate-level Combinational Circuit 1</b></p> <p>1.1 Overview of VHDL 1</p> <p>1.2 General description 2</p> <p>1.3 Structural description 6</p> <p>1.4 Top-level  signal mapping 8</p> <p>1.5 Testbench 9</p> <p>1.6 Bibliographic notes 11</p> <p>1.7 Suggested experiments 11</p> <p><b>2 Overview of FPGA and EDA  software 13</b></p> <p>2.1 FPGA 13</p> <p>2.2 Overview of the Digilent Nexys  4 DDR    board 15</p> <p>2.3 Development flow 16</p> <p>2.4 Xilinx  Vivado  Design  Suite 18</p> <p>2.5 Bibliographic notes 18</p> <p>2.6 Suggested experiments 18</p> <p><b>3 RT-level combinational circuit 23</b></p> <p>3.1 RT-level components 23</p> <p>3.2 Routing circuit with concurrent assignment   statements 29</p> <p>3.3 Modeling with a  process 34</p> <p>3.4 Routing circuit with if and case    statements 36</p> <p>3.5 Constants and generics 41</p> <p>3.6 Replicated structure 44</p> <p>3.7 Design examples 46</p> <p>3.8 Bibliographic notes 58</p> <p>3.9 Suggested experiments 58</p> <p><b>4 Regular Sequential Circuit 61</b></p> <p>4.1 Introduction 61</p> <p>4.2 HDL code of the FF and  register 64</p> <p>4.3 Simple design examples 67</p> <p>4.4 Testbench for sequential circuits 72</p> <p>4.5 Case study 75</p> <p>4.6 Timing  and clocking 87</p> <p>4.7 Bibliographic notes 90</p> <p>4.8 Suggested experiments 90</p> <p><b>5 FSM  93</b></p> <p>5.1 Introduction 93</p> <p>5.2 FSM code development 97</p> <p>5.3 Design examples 100</p> <p>5.4 Bibliographic notes 110</p> <p>5.5 Suggested experiments 110</p> <p><b>6 FSMD 113</b></p> <p>6.1 Introduction 113</p> <p>6.2 Code development of an FSMD 119</p> <p>6.3 Design examples 125</p> <p>6.4 Bibliographic notes 140</p> <p>6.5 Suggested experiments 141</p> <p><b>7 RAM and Buffer of FPGA 145</b></p> <p>7.1 Embedded memory of FPGA device 145</p> <p>7.2 General description for RAM-like   component  147</p> <p>7.3 FIFO buffer  153</p> <p>7.4 HDL templates for memory  inference  158</p> <p>7.5 Overview of memory controller  164</p> <p>7.6 Bibliographic notes  166</p> <p>7.7 Suggested experiments  166</p> <p><b>PART II EMBEDDED SOC I: VANILLA  FPRO SYSTEM</b></p> <p><b>8 Overview of Embedded SoC Systems 171</b></p> <p>8.1 Embedded  SoC 171</p> <p>8.2 Development Flow of Embedded   SoC 173</p> <p>8.3 FPro  SoC Platform 176</p> <p>8.4 Adaption  on  Digilent  Nexys  4  DDR board 180</p> <p>8.5 Portability 182</p> <p>8.6 Organization 184</p> <p>8.7 Bibliographic notes 184</p> <p><b>9 Bare Metal System Software Development 187</b></p> <p>9.1 Bare metal system development overview 187</p> <p>9.2 Memory-mapped  I/O 189</p> <p>9.3 Direct  I/O  Register Access 191</p> <p>9.4 Robust  I/O  Register Access 193</p> <p>9.5 Techniques for low-level I/O  operations 197</p> <p>9.6 Device Drivers 199</p> <p>9.7 FPro  Utility  Routines  and  Directory Structure 204</p> <p>9.8 Test program 208</p> <p>9.9 Bibliographic notes 211</p> <p>9.10 Suggested experiments 211</p> <p><b>10 FPro Bus Protocol and MMIO Slot Specification 213</b></p> <p>10.1 FPro Bus 213</p> <p>10.2 Interface with bus 216</p> <p>10.3 MMIO I/O core 222</p> <p>10.4 Timer core development 226</p> <p>10.5 MMIO controller 229</p> <p>10.6 MCS I/O bus and bridge 234</p> <p>10.7 Vanilla FPRO System Construction 238</p> <p>10.8 Bibliographic notes 240</p> <p>10.9 Suggested experiments 240</p> <p><b>11 UART Core 243</b></p> <p>11.1 Introduction 243</p> <p>11.2 UART Construction 245</p> <p>11.3 UART core  development 253</p> <p>11.4 UART driver 256</p> <p>11.5   Additional  Project Ideas 262</p> <p>11.6 Bibliographic notes 265</p> <p>11.7 Suggested experiments 266</p> <p><b>PART III EMBEDDED SOC II: BASIC I/O CORES</b></p> <p><b>12 Xilinx XADC Core 271</b></p> <p>12.1 Overview of XADC 271</p> <p>12.2 XADC core development 273</p> <p>12.3 XADC core device driver 278</p> <p>12.4 Sampler FPro System 281</p> <p>12.5 Additional Project Ideas 291</p> <p>12.6 Bibliographic notes 292</p> <p>12.7 Suggested experiments 292</p> <p><b>13 Pulse Width Modulation Core 295</b></p> <p>13.1 Introduction 295</p> <p>13.2 PWM Design 296</p> <p>13.3 PWM core development 299</p> <p>13.4 PWM  driver 302</p> <p>13.5 Testing 303</p> <p>13.6 Project ideas 304</p> <p>13.7 Suggested experiments 305</p> <p><b>14 Debouncing  core and LED-Mux  Core 307</b></p> <p>14.1 Debouncing Core 307</p> <p>14.2 LED-Mux   Core 313</p> <p>14.3 Project  Ideas 319</p> <p>14.4 Suggested Experiments 320</p> <p><b>15 SPI Core 323</b></p> <p>15.1 Overview 323</p> <p>15.3 SPI  Core Development  333</p> <p>15.4 SPI Driver  336</p> <p>15.5 Test  338</p> <p>15.6 Project Ideas  341</p> <p>15.7 Bibliographic notes  342</p> <p>15.8 Suggested Experiments  342</p> <p><b>16 I2C Core 347</b></p> <p>16.1 Overview 347</p> <p>16.2 I2C Controller 350</p> <p>16.3 I2C Core Development 360</p> <p>16.4 I2C  Driver 361</p> <p>16.5 Test 365</p> <p>16.6 Project  Idea 366</p> <p>16.7 Bibliographic notes 367</p> <p>16.8 Suggested experiments 367</p> <p><b>17 PS2 Core 371</b></p> <p>17.1 Introduction 371</p> <p>17.2 PS2 Controller 373</p> <p>17.3 PS2 core development 383</p> <p>17.4 PS2 driver 384</p> <p>17.5 Test 393</p> <p>17.6 Bibliographic notes 394</p> <p>17.7 Suggested experiments 394</p> <p><b>18 Sound I: DDFS  Core 397</b></p> <p>18.1 Introduction 397</p> <p>18.2 Design and implementation 397</p> <p>18.3 Fixed-point arithmetic 400</p> <p>18.4 DDFS Construction 402</p> <p>18.5 DAC (digital-to-analog converter) 404</p> <p>18.6 DDFS core development 407</p> <p>18.7 DDFS driver 409</p> <p>18.8 Testing 412</p> <p>18.9 Bibliographic notes 413</p> <p>18.10 Suggested experiments 413</p> <p><b>19 Sound II: ADSR Core 415</b></p> <p>19.1 Introduction 415</p> <p>19.2 ADSR envelope generator 416</p> <p>19.3 ADSR core development 421</p> <p>19.4 ADRS driver 423</p> <p>19.5 Testing 429</p> <p>19.6 Project  Idea 430</p> <p>19.7 Bibliographic notes 431</p> <p>19.8 Suggested experiments 431</p> <p><b>PART IV EMBEDDED SOC III: VIDEO  CORES</b></p> <p><b>20 Introduction to Video System 435</b></p> <p>20.1 Introduction to a video  display 435</p> <p>20.2 Stream interface 437</p> <p>20.3 VGA Synchronization 439</p> <p>20.4 Bar  test-pattern generator 448</p> <p>20.5 Color-to-grayscale conversion circuit 449</p> <p>20.6 Demo video system 451</p> <p>20.7 Advanced video standards 452</p> <p>20.8 Bibliographic notes 453</p> <p>20.9 Suggested experiments 454</p> <p><b>21 FPro Video Subsystem 457</b></p> <p>21.1 Organization of video subsystem 457</p> <p>21.2 FPro video IP core 461</p> <p>21.3 Example video cores 466</p> <p>21.4 FPro video synchronization core 470</p> <p>21.5 Daisy video subsystem 479</p> <p>21.6 Vanilla daisy FPro system 486</p> <p>21.7 Video driver and testing program 490</p> <p>21.8 Bibliographic notes 493</p> <p>21.9 Suggested experiments 493</p> <p><b>22 Sprite Core 497</b></p> <p>22.1 Introduction 497</p> <p>22.2 Basic design 498</p> <p>22.3 Mouse pointer core 500</p> <p>22.4 “Ghost” character core 505</p> <p>22.5 Sprite core driver and testing program 513</p> <p>22.6 Bibliographic notes 516</p> <p>22.7 Suggested experiments 516</p> <p><b>23 On-Screen-Display Core 519</b></p> <p>23.1 Introduction to tile graphics 519</p> <p>23.2 Basic OSD design 521</p> <p>23.3 OSD core  524</p> <p>23.4 OSD core driver and testing   program  530</p> <p>23.5 Bibliographic notes  532</p> <p>23.6 Suggested experiments  532</p> <p><b>24 VGA  Frame  Buffer Core 535</b></p> <p>24.1 Overview 535</p> <p>24.2 Frame buffer core 536</p> <p>24.3 Register map 540</p> <p>24.4 Driver and testing program 542 543</p> <p>24.5 Project Ideas 545</p> <p>24.6 Bibliographic notes 547</p> <p>24.7 Suggested experiments 547</p> <p><b>PART V EPILOGUE</b></p> <p><b>25  What Next 553</b></p> <p>References 557</p> <p>Appendix A: Tutorials 561</p> <p>A.1 Overview of Xilinx Vivado  IDE 561</p> <p>A.2 Short tutorial on Vivado hardware   development 565</p> <p>A.3 Short tutorial on Vivado   simulation 570</p> <p>A.4 Tutorial on IP instantiation 574</p> <p>A.5 Short tutorial on FPro system   development 580</p> <p>A.6 Bibliographic notes 587</p> <p>Topic Index 589</p>
<p><b> PONG P. CHU, PhD</b> is Associate Professor in the Department of Electrical Engineering and Computer Science at Cleveland State University, Cleveland, Ohio. He has taught undergraduate and graduate digital systems and computer architecture courses for more than two decades, and has received multiple instructional grants from the National Science Foundation.
<p><b> A hands-on introduction to FPGA prototyping and SoC design </b> <p> This Second Edition of the popular book follows the same "learning-by-doing" approach to teach the fundamentals and practices of VHDL synthesis and FPGA prototyping. It uses a coherent series of examples to demonstrate the process to develop sophisticated digital circuits and IP (intellectual property) cores, integrate them into an SoC (system on a chip) framework, realize the system on an FPGA prototyping board, and verify the hardware and software operation. The examples start with simple gate-level circuits, progress gradually through the RT (register transfer) level modules, and lead to a functional embedded system with custom I/O peripherals and hardware accelerators. Although it is an introductory text, the examples are developed in a rigorous manner, and the derivations follow strict design guidelines and coding practices used for large, complex digital systems. <p> The new edition is completely updated. It presents the hardware design in the SoC context and introduces the hardware-software co-design concept. Instead of treating examples as isolated entities, the book integrates them into a single coherent SoC platform that allows readers to explore both hardware and software "programmability" and develop complex and interesting embedded system projects. The revised edition: <ul> <li>Adds four general-purpose IP cores, which are multi-channel PWM (pulse width modulation) controller, I<sup>2</sup>C controller, SPI controller, and XADC (Xilinx analog-to-digital converter) controller.</li> <li>Introduces a music synthesizer constructed with a DDFS (direct digital frequency synthesis) module and an ADSR (attack-decay-sustain-release) envelop generator.</li> <li>Expands the original video controller into a complete stream-based video subsystem that incorporates a video synchronization circuit, a test pattern generator, an OSD (on-screen display) controller, a sprite generator, and a frame buffer.</li> <li>Introduces basic concepts of software-hardware co-design with Xilinx MicroBlaze MCS soft-core processor.</li> <li>Provides an overview of bus interconnect and interface circuit.</li> <li>Introduces basic embedded system software development.</li> <li>Suggests additional modules and peripherals for interesting and challenging projects.</li> </ul> <br> <p><i> FPGA Prototyping by VHDL Examples, Second Edition</i> makes a natural companion text for introductory and advanced digital design courses and embedded system courses. It also serves as an ideal self-teaching guide for practicing engineers who wish to learn more about this emerging area of interest.

Diese Produkte könnten Sie auch interessieren:

Pulsed Power
Pulsed Power
von: Gennady A. Mesyats
PDF ebook
CHF 354.00
High-Frequency Oscillator Design for Integrated Transceivers
High-Frequency Oscillator Design for Integrated Transceivers
von: J. van der Tang, Dieter Kasperkovitz, Arthur H.M. van Roermund
PDF ebook
CHF 177.00
MEMS Vibratory Gyroscopes
MEMS Vibratory Gyroscopes
von: Cenk Acar, Andrei Shkel
PDF ebook
CHF 165.50