Details

High-Linearity CMOS RF Front-End Circuits

von: Yongwang Ding, Ramesh Harjani
CHF 118.00
Verlag:	Springer
Format:	PDF
Veröffentl.:	08.02.2006
ISBN/EAN:	9780387238029
Sprache:	englisch
Anzahl Seiten:	128

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Beschreibungen

Titelbeschreibung

This book focuses on high performance radio frequency integrated circuits (RF IC) design in CMOS. 1. Development of radio frequency ICs Wireless communications has been advancing rapidly in the past two decades. Many high performance systems have been developed, such as cellular systems (AMPS, GSM, TDMA, CDMA, W-CDMA, etc. ), GPS system (global po- tioning system) and WLAN (wireless local area network) systems. The rapid growth of VLSI technology in both digital circuits and analog circuits provides benefits for wireless communication systems. Twenty years ago not many p- ple could imagine millions of transistors in a single chip or a complete radio for size of a penny. Now not only complete radios have been put in a single chip, but also more and more functions have been realized by a single chip and at a much lower price. A radio transmits and receives electro-magnetic signals through the air. The signals are usually transmitted on high frequency carriers. For example, a t- ical voice signal requires only 30 Kilohertz bandwidth. When it is transmitted by a FM radio station, it is often carried by a frequency in the range of tens of megahertz to hundreds of megahertz. Usually a radio is categorized by its carrier frequency, such as 900 MHz radio or 5 GHz radio. In general, the higher the carrier frequency, the better the directivity, but the more difficult the radio design.

Titellangbeschreibung

Inhaltsverzeichnis

RF Devices in CMOS Process.- Linear Transconductors in CMOS.- Linearization with Harmonic Cancellation.- LNA Design in CMOS.- Down-Conversion Mixer Design in CMOS.- Power Amplifier Design in CMOS.- Conclusions.

Back cover copy

The rapidly growing wireless communication industry is increasingly demanding CMOS RF ICs due to their lower costs and higher integration levels. The RF front-end of such wireless systems often needs to handle widely disparate signal levels: small desired signals and large interferers. Therefore, it becomes necessary to have highly linear circuits to increase the system dynamic range. However, traditional CMOS circuit designs are usually limited in either their speed or in their linear performance. New techniques are needed to meet the demand for high linearity at radio frequencies.
High-Linearity CMOS RF Front-End Circuits presents some unique techniques to enhance the linearity of both the receiver and transmitter. For example, using harmonic cancellation techniques, the linearity of the receiver front-end can be increased by few tens of dB with only minimal impact on the other circuit parameters. The new parallel class A&B power amplifier can not only increase the transmitter's output power in the linear range, but can also result in significant savings in power consumption.
High-Linearity CMOS RF Front-End Circuits can be used as a textbook for graduate courses in RF CMOS design and will also be useful as a reference for the practicing engineer.

Sonderbeitrag

A new class of power amplifier is presented, as well as techniques to improve the performance of linear integrated circuits in CMOS at high frequencies

Verkaufsargumente

This monograph presents techniques to improve the performance of linear integrated circuits (IC) in CMOS at high frequencies. Those circuits are primarily used in radio-frequency (RF) front-ends of wireless communication systems, such as low noise amplifiers (LNA) and mixers in a receiver and power amplifiers (PA) in a transmitter. A novel linearization technique is presented. With a small trade-off of gain and power consumption this technique can improve the linearity of the majority of circuits by tens of dB. Particularly, for modern CMOS processes, most of which has device matching better than 1%, the distortion can be compressed by up to 40 dB at the output. A prototype LNA has been fabricated in a 0.25um CMOS process, with a measured +18 dBm IIP3. This technique improves the dynamic range of a receiver RF front-end by 12 dB. A new class of power amplifier (parallel class A&B) is also presented to extend the linear operation range and save the DC power consumption. It has been shown by both simulations and measurements that the new PA doubles the maximum output power and reduces the DC power consumption by up to 50%.